TEOS* based SiO2 PECVD

TEOS PECVD showing 84% conformal step coverage (415nm horizontal, 350nm sidewall) SiO2 on Silicon step structure

Process Specification:

Process features

• Conformal step-coverage.
• Good step coverage shape with no voids or ‘nano slits’.
• Control of film stress by selectable or mixed high/low frequency HF/LF power
• Low N-H content provides low loss films at 1550nm. 
• Low stress process provides capability for layer deposition >50mm per wafer.

Additional Notes:

• The data given above applies to High Frequency films. 
• Accuracy of measurement of low stress values is highly dependent on:
• the accuracy of wafer curvature measurement both before and after film deposition 
• the quality and pre-stressing of wafers used for stress measurements and requires a thick film (>5000Å) to produce a detectable/accurately measurable wafer curvature
• Results given above apply to Silicon substrates.
• Cleaning and conditioning of the chamber may be required when switching between processes, to obtain optimum repeatability. A minimum conditioning thickness of 2000-3000A is recommended. Further advice on chamber cleaning/conditioning strategies will be provided by OIPT based on customers’ applications and intended use of system.
• Standard definitions of uniformity given below:

Within wafer uniformity is measured in a five point pattern: