Vertical Notch free trenches in SOI
The Bosch process is routinely used for the deep etching of silicon typically for MEMS applications (Micro-electro-mechanical systems).
One important aspect of MEMS technology is Surface Micro-machining involving a relatively thin (<100µm) device silicon layer above a thin buried insulator (usually SiO2) on a thicker substrate wafer. The thinner SOI layer is structured to form high performance devices such as accelerometers. However etching the SOI down to the buried insulator presents an additional challenge: “notching”.
Notching means the profile of the SOI becomes strongly re-entrant and even undercut at the interface which is unacceptable to most applications. The notching effect is believed to be an effect of charging at the buried layer, although lateral surface diffusion of adsorbed chemicals may also play a role. Some over-etch is essential to be sure of completing the isolation etch of all features, but the excellent reproducibility and uniformity of the OIPT process helps to minimise that time. OIPT offer a process solution that maintain notches below 5% of the total etch depth, with a 0.5um minimum notch undercut each side.