June 2009 - Process News

This is an exciting time for Oxford Instruments Plasma Technology (OIPT) Advances in equipment development in growing industry sectors, such as Photovoltaics and HVPE, mean we can offer our customers new, cost effective and more efficient production tools. & we are confident that we will continue to provide the leading edge processes our customers demand. Below you'll find process news on HVPE, PV and other applications - enjoy!

Oxford Instruments is holding July seminars at host Universities:

Innovations in Processing at the Nanoscale at Southampton University, UK on 2nd July

Plasma Etch Tech 2009 - Pushing the Limits at LBNL, CA, USA 16-17 July

To register or for more info click here

What's the wafer temperature 2: the new batch

Mark Dineen PhD, Principal Applications Engineer, OIPT

Wafer Temperature Etching large numbers of wafers with a photoresist mask requires good temperature control of each wafer, and this requires an understanding of how to transfer the heat from the plasma away from the samples to the cooled electrode.

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Decreasing Cost of Ownership for HBLED Customers

Bob Gunn, Applications Team Leader, OIPT

Cost of ownership A key element in achieving a repeatable process is to ensure that the chamber is kept as clean as possible. Some processes produce by-products that build up on chamber components over a period of time, and can either lead to a process drifting out of specification and/or a particle issue.

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ALD Al2O3 for Passivation of Crystalline Silicon Solar Cells

Knut Beekmann, Product Manager, OIPT

In the battle to improve efficiency in crystalline silicon (c-Si) solar cells, one of the critical factors is avoiding recombination losses of the charge carriers created in the base material.

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Semi-Polar (11.2) GaN on m-Plane Sapphire by HVPE to Increase Optoelectronic Device Performance

Larry Leung, PhD, Product Manager, HVPE Products

In the past decade, Group III-nitride materials have been widely used for visible and ultraviolet light emitting diodes and blue, violet laser diodes. Most of these optoelectronic devices are typically fabricated on the conventional polar (0001) c-plane oriented substrate materials.

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A new technique for eliminating mask undercut in cryogenic silicon etching

Dean Stephens, Senior Applications Engineer, OIPT

For the fabrication of sub-micron silicon features for MEMS applications it is necessary to form openings with vertical sidewall profiles, and to maintain the critical dimension defined by the previous lithographic steps.

Contents

June 2009 - Process News

What's the wafer temperature 2: the new batch

Decreasing Cost of Ownership for HBLED Customers

ALD Al2O3 for Passivation of Crystalline Silicon Solar Cells

Semi-Polar (11.2) GaN on m-Plane Sapphire by HVPE to Increase Optoelectronic Device Performance

A new technique for eliminating mask undercut in cryogenic silicon etching